1. Field of the Invention
The present invention relates to a semiconductor device having a contact portion with a metal wiring. More particularly, the invention relates to a semiconductor device which has improved electrostatic breakdown withstanding ability.
2. Description of Related Art
The conventional method of prevention of junction breakdown in a semiconductor device will be discussed with reference to the technology disclosed in Japanese Unexamined Patent Publication (Kokai) No. Heisei 1-125862, as an example. FIG. 1 of the present application is a section of the semiconductor device proposed in the above-identified publication. As shown in FIG. 1, in a surface region of a p-type semiconductor substrate 1, a high impurity concentration n-type diffusion layer 2 is formed. On the surface of the substrate 1, an interlayer insulation layer 5 is formed. In the interlayer insulation layer 5, a contact hole 7 is formed. Also, on the interlayer insulation layer 5, an aluminum wiring 6 is patterned. A portion of the aluminum wiring 6 filled in the contact hole 7 is in contact with the n-type diffusion layer 2 at the surface of the substrate 1. By this, a contact portion between the aluminum wiring 6 and the n-type diffusion layer 2 is formed. Below the contact portion of the aluminum wiring 6, a low impurity concentration n well 3 is formed.
The semiconductor device constructed as set forth above has a structure resilient to breakdown at pn junction immediately below the connecting portion between the aluminum wiring 6 and the n-type diffusion layer 2 even when excessive voltage, such as an electrostatic pulse, is applied to an external terminal connected to the aluminum wiring 6, for the presence of n well 3 having low impurity concentration beneath the contact portion of the aluminum wiring 6 to provide high junction withstanding voltage.
However, in the above-mentioned semiconductor device, in particular, when n-type diffusion layer 2 becomes shallow, to the extent to less than or equal to 0.5 .mu.m due to down-sizing of the device, upon application of the electrostatic pulse, almost all of the current flows on the surface of the semiconductor. Therefore, the junction withstand voltage becomes the lowest in the vicinity of a portion 8 of FIG. 1. This encounters a problem in that current may flow into the substrate at this portion 8.
Therefore, when an electrostatic breakdown protective element is constructed by providing two diffusion layers of this type in the vicinity of each other (see FIG. 5), while it is expected that the current may flow between the diffusion layers upon application of high voltage, the current flows between the substrate and the diffusion layer to make it impossible to operate the protective element normally. As a result, discharge becomes insufficient to possibly cause breakdown of the internal circuit due to elevated voltage.